Renesas Electronics FIFO Memory, 28-Pin PDIP, 7204L12TPG
- RS Stock No.:
- 262-8983
- Mfr. Part No.:
- 7204L12TPG
- Brand:
- Renesas Electronics
Bulk discount available
Subtotal (1 unit)*
Kr.266 06
(exc. VAT)
Kr.332 58
(inc. VAT)
FREE delivery for online orders over 500,00 kr
Last RS stock
- Final 12 unit(s), ready to ship
Units | Per unit |
|---|---|
| 1 - 4 | Kr. 266,06 |
| 5 - 9 | Kr. 260,72 |
| 10 - 27 | Kr. 247,90 |
| 28 - 55 | Kr. 245,04 |
| 56 + | Kr. 239,10 |
*price indicative
- RS Stock No.:
- 262-8983
- Mfr. Part No.:
- 7204L12TPG
- Brand:
- Renesas Electronics
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Renesas Electronics | |
| Product Type | FIFO Memory | |
| Organisation | 4096 x 9 bit | |
| Data Bus Width | 9bit | |
| Access Time | 12ns | |
| Mount Type | Surface | |
| Minimum Supply Voltage | 4.5V | |
| Package Type | PDIP | |
| Maximum Supply Voltage | 5.5V | |
| Pin Count | 28 | |
| Minimum Operating Temperature | 0°C | |
| Bus Direction | Bi-Directional | |
| Maximum Operating Temperature | 70°C | |
| Width | 7.62 mm | |
| Standards/Approvals | No | |
| Height | 3.3mm | |
| Length | 34.3mm | |
| Series | 7204 | |
| Supply Current | 120mA | |
| Number of Bits per Word | 9 | |
| Automotive Standard | No | |
| Select all | ||
|---|---|---|
Brand Renesas Electronics | ||
Product Type FIFO Memory | ||
Organisation 4096 x 9 bit | ||
Data Bus Width 9bit | ||
Access Time 12ns | ||
Mount Type Surface | ||
Minimum Supply Voltage 4.5V | ||
Package Type PDIP | ||
Maximum Supply Voltage 5.5V | ||
Pin Count 28 | ||
Minimum Operating Temperature 0°C | ||
Bus Direction Bi-Directional | ||
Maximum Operating Temperature 70°C | ||
Width 7.62 mm | ||
Standards/Approvals No | ||
Height 3.3mm | ||
Length 34.3mm | ||
Series 7204 | ||
Supply Current 120mA | ||
Number of Bits per Word 9 | ||
Automotive Standard No | ||
- COO (Country of Origin):
- TH
The Renesas Electronics FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a retransmit capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
Pin and functionally compatible with 720X family
Low power consumption
Ultra high speed 12ns access time
Asynchronous and simultaneous read and write
Fully expandable by both word depth and/or bit width
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