DiodesZetex, 4 2-Input NAND Logic Gate, 14-Pin TSSOP
- RS Stock No.:
- 122-1482
- Mfr. Part No.:
- 74LVC00AT14-13
- Brand:
- DiodesZetex
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- RS Stock No.:
- 122-1482
- Mfr. Part No.:
- 74LVC00AT14-13
- Brand:
- DiodesZetex
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | DiodesZetex | |
| Logic Function | NAND | |
| Product Type | Logic Gate | |
| Mount Type | Surface | |
| Number of Elements | 4 | |
| Number of Inputs per Gate | 2 | |
| Schmitt Trigger Input | No | |
| Package Type | TSSOP | |
| Pin Count | 14 | |
| Logic Family | LVC | |
| Input Type | CMOS | |
| Maximum Propagation Delay Time @ CL | 9.5ns | |
| Minimum Operating Temperature | -40°C | |
| Maximum High Level Output Current | -24mA | |
| Maximum Operating Temperature | 125°C | |
| Height | 1.05mm | |
| Maximum Supply Voltage | 5.5V | |
| Width | 4.5 mm | |
| Minimum Supply Voltage | 1.65V | |
| Standards/Approvals | No | |
| Length | 5.1mm | |
| Maximum Low Level Output Current | 24mA | |
| Output Type | Push Pull | |
| Automotive Standard | No | |
| Select all | ||
|---|---|---|
Brand DiodesZetex | ||
Logic Function NAND | ||
Product Type Logic Gate | ||
Mount Type Surface | ||
Number of Elements 4 | ||
Number of Inputs per Gate 2 | ||
Schmitt Trigger Input No | ||
Package Type TSSOP | ||
Pin Count 14 | ||
Logic Family LVC | ||
Input Type CMOS | ||
Maximum Propagation Delay Time @ CL 9.5ns | ||
Minimum Operating Temperature -40°C | ||
Maximum High Level Output Current -24mA | ||
Maximum Operating Temperature 125°C | ||
Height 1.05mm | ||
Maximum Supply Voltage 5.5V | ||
Width 4.5 mm | ||
Minimum Supply Voltage 1.65V | ||
Standards/Approvals No | ||
Length 5.1mm | ||
Maximum Low Level Output Current 24mA | ||
Output Type Push Pull | ||
Automotive Standard No | ||
- COO (Country of Origin):
- CN
74LVC Family, Diodes Inc
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS